LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 270

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
12.4 Interfaces
UM10360
User manual
Fig 33. USB Host controller block diagram
12.3.1 Features
12.3.2 Architecture
DMA interface
(AHB master)
(AHB slave)
interface
register
Table 252. USB (OHCI) related acronyms and abbreviations used in this chapter
The architecture of the USB host controller is shown below in
The USB interface is controlled by the OTG controller. It has one USB port.
Acronym/abbreviation
LS
OHCI
USB
•
•
•
•
•
OHCI compliant.
OpenHCI specifies the operation and interface of the USB Host Controller and SW
Driver
– USBOperational: Process Lists and generate SOF Tokens.
– USBReset: Forces reset signaling on the bus, SOF disabled.
– USBSuspend: Monitor USB for wake-up activity.
– USBResume: Forces resume signaling on the bus.
The Host Controller has four USB states visible to the SW Driver.
HCCA register points to Interrupt and Isochronous Descriptors List.
ControlHeadED and BulkHeadED registers point to Control and Bulk Descriptors List.
USB HOST BLOCK
INTERFACE
INTERFACE
REGISTER
MASTER
BUS
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
CONTROLLER
HOST
Chapter 12: LPC17xx USB Host controller
Description
Low Speed
Open Host Controller Interface
Universal Serial Bus
CONTROL
LOGIC/
PORT
MUX
ATX
Figure
33.
USB
ATX
UM10360
© NXP B.V. 2010. All rights reserved.
USB
port
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