LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 638

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 600. Flash Module Signature Start register (FMSSTART - 0x4008 4020) bit description
Table 601. Flash Module Signature Stop register (FMSSTOP - 0x4008 4024) bit description
Table 602. FMSW0 register bit description (FMSW0, address: 0x4008 402C)
Table 603. FMSW1 register bit description (FMSW1, address: 0x4008 4030)
UM10360
User manual
Bit
31:17
16:0
Bit
31:18
17
16:0
Bit
31:0
Bit
31:0
Symbol
-
START
Symbol
-
SIG_START
STOP
Symbol
SW0[31:0]
Symbol
SW1[63:32]
32.10.1.1 Signature generation address and control registers
32.10.1.2 Signature generation result registers
Description
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Signature generation start address (corresponds to AHB byte address bits[20:4]).
Value
0
1
These registers control automatic signature generation. A signature can be generated for
any part of the flash memory contents. The address range to be used for generation is
defined by writing the start address to the signature start address register (FMSSTART)
and the stop address to the signature stop address register (FMSSTOP. The start and
stop addresses must be aligned to 128-bit boundaries and can be derived by dividing the
byte address by 16.
Signature generation is started by setting the SIG_START bit in the FMSSTOP register.
Setting the SIG_START bit is typically combined with the signature stop address in a
single write.
Table 600
registers respectively.
The signature generation result registers return the flash signature produced by the
embedded signature generator. The 128-bit signature is reflected by the four registers
FMSW0, FMSW1, FMSW2 and FMSW3.
The generated flash signature can be used to verify the flash memory contents. The
generated signature can be compared with an expected signature and thus makes saves
time and code space. The method for generating the signature is described in
Section
Table 605
respectively.
Description
Word 0 of 128-bit signature (bits 31 to 0).
Description
Word 1 of 128-bit signature (bits 63 to 32).
Description
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
Start control bit for signature generation.
Signature generation is stopped
Initiate signature generation
BIST stop address divided by 16 (corresponds to AHB byte address [20:4]).
32.10.2.
and
show bit assignment of the FMSW0 and FMSW1, FMSW2, FMSW3 registers
Table 601
All information provided in this document is subject to legal disclaimers.
Chapter 32: LPC17xx Flash memory interface and programming
Rev. 2 — 19 August 2010
show the bit assignments in the FMSSTART and FMSSTOP
UM10360
© NXP B.V. 2010. All rights reserved.
Reset Value
NA
0
Reset Value
NA
0
0
Reset Value
-
Reset Value
-
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