LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 121

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
9.3 Applications
9.4 Pin description
UM10360
User manual
Table 100. GPIO pin description
[1]
[2]
Pin Name
P0[30:0]
P1[31:0]
P2[13:0];
P3[26:25];
P4[29:28]
•
•
•
•
•
•
•
Registers provide a software view of pending rising edge interrupts, pending falling
edge interrupts, and overall pending GPIO interrupts.
GPIO0 and GPIO2 interrupts share the same position in the NVIC with External
Interrupt 3.
General purpose I/O
Driving LEDs or other indicators
Controlling off-chip devices
Sensing digital inputs, detecting edges
Bringing the part out of Power-down mode
P0[14:12] are not available.
P1[2], P1[3], P1[7:5], P1[13:11] are not available.
[1]
[2]
;
;
Type
Input/
Output
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Description
General purpose input/output. These are typically shared with other
peripherals functions and will therefore not all be available in an
application. Packaging options may affect the number of GPIOs
available in a particular device.
Some pins may be limited by requirements of the alternate functions of
the pin. For example, the pins containing the I
open-drain for any function selected on that pin. Details may be found
in
Section
Chapter 9: LPC17xx General Purpose Input/Output (GPIO)
7.1.1.
2
C0 functions are
UM10360
© NXP B.V. 2010. All rights reserved.
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