LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 62

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
4.8.7.1 Encoding of Reduced Power Modes
4.8.8 Wake-up from Reduced Power Modes
4.8.9 Power Control for Peripherals register (PCONP - 0x400F C0C4)
The PM1and PM0 bits in PCON allow entering reduced power modes as needed. The
encoding of these bits allows backward compatibility with devices that previously only
supported Sleep and Power-down modes.
three reduced power modes supported by the LPC17xx.
Table 45.
Any enabled interrupt can wake up the CPU from Sleep mode. Certain interrupts can
wake up the processor if it is in either Deep Sleep mode or Power-down mode.
Interrupts that can occur during Deep Sleep or Power-down mode will wake up the CPU if
the interrupt is enabled. After wake-up, execution will continue to the appropriate interrupt
service routine. These interrupts are NMI, External Interrupts EINT0 through EINT3, GPIO
interrupts, Ethernet Wake-on-LAN interrupt, Brownout Detect, RTC Alarm, CAN Activity
Interrupt, and USB Activity Interrupt. In addition, the watchdog timer can wake up the part
from Deep Sleep mode if the watchdog timer is being clocked by the IRC oscillator. For
the wake-up process to take place the corresponding interrupt must be enabled in the
NVIC. For pin-related peripheral functions, the related functions must also be mapped to
pins.
The CAN Activity Interrupt is generated by activity on the CAN bus pins, and the USB
Activity Interrupt is generated by activity on the USB bus pins. These interrupts are only
useful to wake up the CPU when it is on Deep Sleep or Power-down mode, when the
peripheral functions are powered up, but not active. Typically, if these interrupts are used,
their flags should be polled just before enabling the interrupt and entering the desired
reduced power mode. This can save time and power by avoiding an immediate wake-up.
Upon wake-up, the interrupt service can turn off the related activity interrupt, do any
application specific setup, and exit to await a normal peripheral interrupt.
In Deep Power-down mode, internal power to most of the device is removed, which limits
the possibilities for waking up from this mode. Wake-up from Deep Power-down mode will
occur when an external reset signal is applied, or the RTC interrupt is enabled and an
RTC interrupt is generated.
The PCONP register allows turning off selected peripheral functions for the purpose of
saving power. This is accomplished by gating off the clock source to the specified
peripheral blocks. A few peripheral functions cannot be turned off (i.e. the Watchdog timer,
the Pin Connect block, and the System Control block).
PM1, PM0
00
01
10
11
Encoding of reduced power modes
Description
Execution of WFI or WFE enters either Sleep or Deep Sleep mode as defined by the
SLEEPDEEP bit in the Cortex-M3 System Control Register.
Execution of WFI or WFE enters Power-down mode if the SLEEPDEEP bit in the
Cortex-M3 System Control Register is 1.
Reserved, this setting should not be used.
Execution of WFI or WFE enters Deep Power-down mode if the SLEEPDEEP bit in
the Cortex-M3 System Control Register is 1.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 4: LPC17xx Clocking and power control
Table 45
below shows the encoding for the
UM10360
© NXP B.V. 2010. All rights reserved.
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