LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 116

IC ARM CORTEX MCU 512K 100-LQFP

LPC1767FBD100,551

Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1767FBD100,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-4967
935289808551

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LPC1767FBD100,551
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LPC1767FBD100,551
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NXP Semiconductors
UM10360
User manual
8.5.17 Open Drain Pin Mode select register 1 (PINMODE_OD1 -
Table 94.
[1]
[2]
[3]
0x4002 C06C)
This register controls the open drain mode for Port 1 pins. For details see
mode select register
Table 95.
PINMODE
_OD0
10
11
14:12
15
16
17
18
19
20
21
22
23
24
25
26
28:27
29
30
31
PINMODE
_OD1
0
1
3:2
4
Not available on 80-pin package.
Port 0 pins 27 and 28 should be set up using the I2CPADCFG register if they are used for an I
27 and 28 of PINMODE_OD0 do not have any affect on these pins, they are special open drain I
compatible pins.
Port 0 bits 1:0, 11:10, and 20:19 may potentially be used for I
should be configured for open drain mode via the related bits in PINMODE_OD0.
Open Drain Pin Mode select register 0 (PINMODE_OD0 - address 0x4002 C068) bit
description
Open Drain Pin Mode select register 1 (PINMODE_OD1 - address 0x4002 C06C) bit
description
Symbol
P0.10OD
P0.11OD
-
P0.15OD
P0.16OD
P0.17OD
P0.18OD
P0.19OD
P0.20OD
P0.21OD
P0.22OD
P0.23OD
P0.24OD
P0.25OD
P0.26OD
-
P0.29OD
P0.30OD
-
Symbol
P1.00OD
P1.01OD
-
P1.04OD
[2]
All information provided in this document is subject to legal disclaimers.
[3]
[3]
[3]
[3]
values”.
Rev. 2 — 19 August 2010
Value Description
Value Description
0
1
Port 0 pin 10 open drain mode control, see P0.00OD
Port 0 pin 11 open drain mode control, see P0.00OD
Reserved.
Port 0 pin 15 open drain mode control, see P0.00OD
Port 0 pin 16 open drain mode control, see P0.00OD
Port 0 pin 17 open drain mode control, see P0.00OD
Port 0 pin 18 open drain mode control, see P0.00OD
Port 0 pin 19 open drain mode control, see P0.00OD
Port 0 pin 20open drain mode control, see P0.00OD
Port 0 pin 21 open drain mode control, see P0.00OD
Port 0 pin 22 open drain mode control, see P0.00OD
Port 0 pin 23 open drain mode control, see P0.00OD
Port 0 pin 24open drain mode control, see P0.00OD
Port 0 pin 25 open drain mode control, see P0.00OD
Port 0 pin 26 open drain mode control, see P0.00OD
Reserved.
Port 0 pin 29 open drain mode control, see P0.00OD
Port 0 pin 30 open drain mode control, see P0.00OD
Reserved.
Port 1 pin 0 open drain mode control.
P1.0 pin is in the normal (not open drain) mode.
P1.0 pin is in the open drain mode.
Port 1 pin 1 open drain mode control, see P1.00OD
Reserved.
Port 1 pin 4 open drain mode control, see P1.00OD
Chapter 8: LPC17xx Pin connect block
2
C-buses using standard port pins. If so, they
UM10360
© NXP B.V. 2010. All rights reserved.
Section 8.4 “Pin
2
C-bus. Bits
116 of 840
2
C-bus
Reset
value
0
0
NA
0
0
0
0
0
0
0
0
0
0
0
0
NA
0
0
NA
Reset
value
0
0
NA
0

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