LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 367

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 329. CAN Receive Data register B (CAN1RDB - address 0x4004 402C, CAN2RDB - address 0x4004 802C) bit
Table 330. CAN Transmit Frame Information register (CAN1TFI[1/2/3] - address 0x4004 40[30/40/50], CAN2TFI[1/2/3] -
UM10360
User manual
Bit
15:8
23:16 Data 7
31:24 Data 8
Bit
7:0
15:8
19:16 DLC
29:20 -
30
31
Symbol
Data 6
Symbol
PRIO
-
RTR
FF
description
0x4004 80[30/40/50]) bit description
16.7.13 CAN Transmit Frame Information register (CAN1TFI[1/2/3] -
Function
If the TPM (Transmit Priority Mode) bit in the CANxMOD register is set to 1, enabled Tx
Buffers contend for the right to send their messages based on this field. The buffer with the
lowest TX Priority value wins the prioritization and is sent first.
Reserved.
Data Length Code. This value is sent in the DLC field of the next transmit message. In
addition, if RTR = 0, this value controls the number of Data bytes sent in the next transmit
message, from the CANxTDA and CANxTDB registers:
0000-0111 = 0-7 bytes
1xxx = 8 bytes
Reserved.
This value is sent in the RTR bit of the next transmit message. If this bit is 0, the number of
data bytes called out by the DLC field are sent from the CANxTDA and CANxTDB registers.
If this bit is 1, a Remote Frame is sent, containing a request for that number of bytes.
If this bit is 0, the next transmit message will be sent with an 11-bit Identifier (standard frame
format), while if it’s 1, the message will be sent with a 29-bit Identifier (extended frame
format).
Function
If the DLC field in CANRFS
received message.
If the DLC field in CANRFS
received message.
If the DLC field in CANRFS
received message.
0x4004 40[30/ 40/50], CAN2TFI[1/2/3] - 0x4004 80[30/40/50])
When the corresponding TBS bit in CANSR is 1, software can write to one of these
registers to define the format of the next transmit message for that Tx buffer. Bits not listed
read as 0 and should be written as 0.
The values for the reserved bits of the CANxTFI register in the Transmit Buffer should be
set to the values expected in the Receive Buffer for an easy comparison, when using the
Self Reception facility (self test), otherwise they are not defined.
The CAN Controller consist of three Transmit Buffers. Each of them has a length of 4
words and is able to store one complete CAN message as shown in
The buffer layout is subdivided into Descriptor and Data Field where the first word of the
Descriptor Field includes the TX Frame Info that describes the Frame Format, the Data
Length and whether it is a Remote or Data Frame. In addition, a TX Priority register allows
the definition of a certain priority for each transmit message. Depending on the chosen
Frame Format, an 11-bit identifier for Standard Frame Format (SFF) or an 29-bit identifier
for Extended Frame Format (EFF) follows. Note that unused bits in the TID field have to
be defined as 0. The Data Field in TDA and TDB contains up to eight data bytes.
All information provided in this document is subject to legal disclaimers.
≥
≥
≥
0110, this contains the first Data byte of the current
1000, this contains the first Data byte of the current
0111, this contains the first Data byte of the current
Rev. 2 — 19 August 2010
Chapter 16: LPC17xx CAN1/2
Reset Value
0
0
0
Figure
UM10360
© NXP B.V. 2010. All rights reserved.
54.
Reset
Value
0
0
0
0
0
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RM Set
X
X
X
RM
Set
x
X
X
X