LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 778

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
UM10360
User manual
34.4.3.11.2 Bus Fault Status Register
Table 668. MMFSR bit assignments
The flags in the BFSR indicate the cause of a bus access fault. The bit assignments are
shown in
Table 669. BFSR bit assignments
Bits
[3]
[2]
[1]
[0]
Bits
[7]
[6:5]
-
Name
BFARVALID
Name
MUNSTKERR
-
DACCVIOL
IACCVIOL
Table
669.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Function
Bus Fault Address Register (BFAR) valid flag:
0 = value in BFAR is not a valid fault address
1 = BFAR holds a valid fault address.
The processor sets this bit to 1 after a bus fault where the address is
known. Other faults can set this bit to 0, such as a memory management
fault occurring later.
If a bus fault occurs and is escalated to a hard fault because of priority,
the hard fault handler must set this bit to 0. This prevents problems if
returning to a stacked active bus fault handler whose BFAR value has
been overwritten.
Reserved.
Function
Memory manager fault on unstacking for a return from exception:
0 = no unstacking fault
1 = unstack for an exception return has caused one or more access
violations.
This fault is chained to the handler. This means that when this bit is
1, the original return stack is still present. The processor has not
adjusted the SP from the failing return, and has not performed a new
save. The processor has not written a fault address to the MMAR.
Reserved
Data access violation flag:
0 = no data access violation fault
1 = the processor attempted a load or store at a location that does
not permit the operation.
When this bit is 1, the PC value stacked for the exception return
points to the faulting instruction. The processor has loaded the
MMAR with the address of the attempted access.
Instruction access violation flag:
0 = no instruction access violation fault
1 = the processor attempted an instruction fetch from a location that
does not permit execution.
This fault occurs on any access to an XN region, even when the
MPU is disabled.
When this bit is 1, the PC value stacked for the exception return
points to the faulting instruction. The processor has not written a
fault address to the MMAR.
Chapter 34: Appendix: Cortex-M3 user guide
UM10360
© NXP B.V. 2010. All rights reserved.
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