mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 968

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
17.4 PCMCIA OPERATION
17.4.1 Memory-Only Cards
Table 17-2 shows a worst case example of host programming.
Table 17-2 assumes you are not using the WAIT_B signal. If you are using it, then the
minimum strobe time is at least 35ns + 1 system clock.
17.4.2 I/O Cards
Table 17-3 shows a worst case example of programming PCMCIA host for I/O cycle.
Setup time worst case is for write, so setup = data_setup_before_IORD +1 system clock.
MEMORY
ACCESS
CYCLE
TIME
20ns
30ns
40ns
62ns
83ns
CLK
STP
100
6
4
3
2
2
Note: Because the minimum hold time is one clock, the real access time is access time
600NS
LNG
300
24
16
12
Table 17-2. Host Programming for Memory Cards
8
6
plus one clock. Hold time and setup time HLD and STP, in this table, are the read
or write worst case. The worst case hold time is data disable from OE. The worst
case setup time is address to strobe. Length (LNG) is the minimum strobe time.
Table 17-3. Host Programming For I/O Cards
Freescale Semiconductor, Inc.
HLD
150
For More Information On This Product,
8
5
4
3
2
20ns
30ns
40ns
62ns
83ns
MPC823 REFERENCE MANUAL
STP
30
2
2
1
1
1
Go to: www.freescale.com
STP(1)
200NS
LNG
120
4
3
3
2
2
8
5
4
2
2
HLD
90
5
3
3
2
2
LNG
8
6
4
3
2
STP
20
2
1
1
1
1
150NS
LNG
80
HLD
6
4
3
2
1
2
1
1
1
1
HLD
75
4
3
2
2
1
STP
15
1
1
1
1
1
PCMCIA Interface
100NS
LNG
60
4
3
2
1
1
HLD
50
3
2
2
1
1
17-7

Related parts for mpc823rg