mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 630

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
Communication Processor Module
All protocols can have their buffer descriptors point to data buffers that are located in the
internal dual-port RAM. However, because the internal RAM is being used for buffer
descriptors, it is customary for the data buffers to be located in external RAM, especially if
the data buffers are large. In most instances, the internal U-Bus is used to transfer data to
the data buffer.
The communication processor module processes the TX buffer descriptors in a
straightforward manner. Once the transmit side of a serial communication controller is
enabled, it starts with the first buffer descriptor in that SCCx transmit table. Once the
communication processor module detects that the R bit is set in the TX buffer descriptor, it
starts processing the buffer. The communication processor module detects that the buffer
descriptor is ready when it polls the R bit or when you try to write to the TODR. Once the
data from the buffer descriptor has been placed in the transmit FIFO, the communication
processor module moves on to the next buffer descriptor, again waiting for that buffer
descriptor R bit to be set. Thus, the communication processor module does no look-ahead
buffer descriptor processing, nor does it skip over buffer descriptors that are not ready.
When the communication processor module sees the W bit set in a buffer descriptor, it goes
back to the beginning of the buffer descriptor table after processing of the buffer descriptor
is complete. After using a buffer descriptor, the communication processor module normally
sets the R bit to 0, thus, the communication processor module does not use a buffer
descriptor twice until the buffer descriptor has been confirmed by the core. The one
exception to this rule is that the MPC823 supports an option for repeated transmission called
continuous mode, whereby the R bit stays set to 1. This is available in some protocols.
The communication processor module uses the RX buffer descriptors in a similar fashion.
Once the receive side of a serial communication controller is enabled, it starts with the first
buffer descriptor in that SCCx receive buffer descriptor table. Once data arrives from the
serial line into a serial communication controller, the communication processor module
performs certain required protocol processing on the data and moves the resultant data to
the data buffer pointed to by the first buffer descriptor. Use of a buffer descriptor is complete
when there is no more room left in the buffer or when certain events occur, such as detection
of an error or an end-of-frame. Whatever the reason, the buffer is then closed and additional
data is stored using the next buffer descriptor.
Whenever the communication processor module needs to begin using a buffer descriptor
because new data is arriving, it checks the E bit of that buffer descriptor. If the current buffer
descriptor is not empty, it reports a busy error. However, it does not move from the current
buffer descriptor until it is empty. When the communication processor module discovers the
W bit set in a buffer descriptor, it goes back to the beginning of the buffer descriptor table
after processing is complete and after using a buffer descriptor, the communication
processor module sets the E bit to 0 and never uses a buffer descriptor twice until it has been
processed by the core. The one exception to this rule is that the MPC823 supports an option
for repeated reception called continuous mode, whereby the E bit stays set to 1. This is
available in some protocols.
MPC823 REFERENCE MANUAL
MOTOROLA
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