mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 298

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
12.11 MULTIPLEXING THE SYSTEM INTERFACE UNIT PINS
Due to the limited number of pins available in the MPC823 package, some of the
functionalities share pins. The actual MPC823 pinout is illustrated in
Section 2 External Signals. The following table shows how the functionality is controlled
on each pin.
TSIZ0/REG
BDIP/GPL_B5
RSV/IRQ2
KR/RETRY/IRQ4/SPKROUT
DP[0:3]/IRQ[3:6]
FRZ/IRQ6
CS6/CE1_B
CS7/CE2_B
WE0/BS_AB0/IORD
WE1/BS_AB1/IOWR
WE2/BS_AB2/PCOE
WE3/BS_AB3/PCWE
GPL_A0/GPL_B0
OE/GPL_A1/GPL_B1
GPL_A[2:3]/GPL_B[2:3]/
CS[2:3]
ALE_B/DSCK/AT1
IP_B[0:1]/IWP[0:1]/VFLS[0:1]
IP_B2/IOIS16_B/AT2
IP_B3/IWP2/VF2
IP_B4/LWP0/VF0
IP_B5/LWP1/VF1
IP_B6/DSDI/AT0
IP_B7/PTR/AT3
TDI/DSDI
TCK/DSCK
TDO/DSDO
UPWAITA/GPL_A4/AS
OP2/MODCK2/STS
OP3/MODCK2/DSDO
PIN NAME
Freescale Semiconductor, Inc.
For More Information On This Product,
Dynamically active depending if the transaction addresses a slave controlled by
the PCMCIA interface.
Programmed in the SIUMCR.
Address matching and bank valid bits.
When there is a transfer such that there is a match in either memory controller
bank 6 or any PCMCIA bank mapped to slot B, the CS6/CE1_B will be asserted.
When there is a transfer such that there is a match in either memory controller
bank 7 or any PCMCIA bank mapped to slot B, the CS7/CE2_B will be asserted.
Dynamically active depending on the machine (GPCM, UPMB, or PCMCIA
interface) assigned to control the required slave.
Dynamically active depending on the machine (UPMA or UPMB) assigned to
control the required slave.
Dynamically active depending on the machine (GPCM, UPMA, or UPMB)
assigned to control the required slave.
GPL_A[2:3]/GPL_B[2:3]:
(UPMA or UPMB) assigned to control the required slave.
GPL_A[2:3]/CS[2:3]:
Programmed in the SIUMCR and hard reset configuration.
Programmed in the SIUMCR and MAMR of the memory controller.
At power-on reset, this functions as MODCK[1:2]
Otherwise, programmed in the SIUMCR and hard reset configuration.
Table 12-2. Multiplexing Control
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
PIN CONFIGURATION CONTROL
Dynamically active depending on the machine
Programmed in the SIUMCR.
System Interface Unit
12-29

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