mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 248

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

11.6.1.8 MMU INSTRUCTION ACCESS PROTECTION REGISTER. The MMU instruction
access protection (MI_AP) register contains the access protection group for the instruction
memory management unit.
GPx—Group Protection
In domain manager mode, these bits have the following settings.
In PowerPC mode, the GPx bits have these settings and are privilege and problem state
(Ks and Kp) in the PowerPC Microprocessor Family: The Programming Environment for
32-Bit Microprocessors manual:
MI_AP
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
00 = No access.
01 = Client-access permission defined by page protection bits.
10 = Reserved.
11 = Manager-free access.
00 = All accesses are considered privileged.
01 = Access permission defined by page protection bits.
10 = Problem and privileged interpretation is swapped.
11 = All accesses are considered problem.
16
0
GP0
R/W
GP8
R/W
—
—
17
1
18
2
GP1
R/W
GP9
R/W
Freescale Semiconductor, Inc.
—
—
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
GP10
GP2
R/W
R/W
—
—
Go to: www.freescale.com
21
5
22
6
GP11
GP3
R/W
R/W
—
—
23
SPR 786
SPR 786
7
24
8
GP12
GP4
R/W
R/W
—
—
25
9
10
26
GP13
GP5
R/W
R/W
—
—
11
27
Memory Management Unit
12
28
GP14
GP6
R/W
R/W
—
—
13
29
14
30
GP15
GP7
R/W
R/W
—
—
11-31
15
31