mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 578

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.7.5 Serial Interface Programming Model
16.7.5.1 SERIAL INTERFACE GLOBAL MODE REGISTER. The 8-bit, memory-mapped,
read/write serial interface global mode register (SIGMR) defines the RAM division modes.
Bits 0–4—Reserved
These bits are reserved and must be set to 0.
ENA—Enable Channel A
RDM—RAM Division Mode
This field defines the RAM division mode and the number of multiplexed channels supported
in the serial interface.
SIGMR
RESET
FIELD
ADDR
R/W
BIT
0 = Channel A is disabled. The serial interface RAMs and TDM routing are in a state
1 = The serial interface is enabled.
00 = The serial interface supports one TDM channel with 64 entries for receive routing
01 = The serial interface supports one TDM channel with 32 entries for receive routing
1x = Reserved.
of reset, but all other serial interface functions still operate.
and another 64 for transmit routing.
and another 32 for transmit routing. There are an additional 32 shadow entries for
the receive routing and 32 more for transmit routing that can be used to
dynamically change the routing.
0
Freescale Semiconductor, Inc.
1
For More Information On This Product,
RESERVED
MPC823 REFERENCE MANUAL
R/W
2
0
Go to: www.freescale.com
(IMMR & 0xFFFF0000) + 0xAE4
3
4
ENA
R/W
5
0
6
RDM
R/W
0
MOTOROLA
7