mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1136

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

21.4 MPC823 RESTRICTIONS
The control afforded by the output enable signals using the boundary scan register and the
extest instruction requires a compatible circuit board test environment to avoid
device-destructive configurations. You must avoid situations in which the MPC823 output
drivers are enabled into actively driven networks. The MPC823 features a low-power stop
mode. The interaction of the scan chain interface with low-power stop mode is as follows:
1. The TAP controller must be in the test-logic-reset state to either enter or remain in the
2. The TCK input is not disabled in low-power stop mode. To consume minimal power,
3. The TMS, TDI, and TRST pins include on-chip pull-up resistors. In low-power stop
low-power stop mode. Leaving the TAP controller in the test-logic-reset state negates
its ability to achieve low power, but does not otherwise affect device functionality.
the TCK input must be externally connected to V
normal mode (nonscan chain).
mode, the TMS and TDI pins must remain either unconnected or connected to V
achieve minimal power consumption. For proper reset of the scan chain test logic, the
best approach is to pull active TRST at power-on reset. The easiest way to do this and
reset the scan chain logic is to connect TRST to PORESET through a diode (cathode
to PORESET). In power-down mode, you must ensure that the xRESET line is low
during power-down so that you can conserve power. If the TAP controller is not used,
you must ground the TRST signal. If, for some reason, the HRESET signal that you
connected to TRST is high during power-down, the KAPWR supply will propagate
through the TRST pin to undesired internal circuits and will increase power
consumption.
Note: We recommend that you connect TRST to ground (if you don't use JTAG) or to
]
PORESET through a diode. The problem with the connection to HRESET is that
if at power up the JTAG logic blocks the PORESET signal from propagating into
the chip (since the logic is not initialized yet), this will prevent HRESET from
asserting, which leaves the JTAG logic (and the whole device) uninitialized.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
CC
or ground while in low-power or
IEEE 1149.1 Test Access Port
CC
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