mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 558

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
Interlaced mode can be set up using the following steps:
When configured to single buffer mode, the IDMA parameter RAM is overlayed with the
specific parameters in Table 16-22.
NOTE: You are only responsible for initializing the items in bold.
1. Initialize the IDMA single buffer mode parameter RAM.
2. In the RCCR, set the EIE bit to 1 and the DR1M bit according to the requested mode.
3. If edge-sensitive mode is selected, program the EDM15 bit of the PCINT register to
4. In the PCSO register, set the DREQ1 bit to 1. See Section 16.14.9.4 Port C Special
DMA Base + 1C to
DMA Base + 0C
DMA Base + 1A
DMA Base + 3F
DMA Base + 00
DMA Base + 04
DMA Base + 08
DMA Base + 10
DMA Base + 12
DMA Base + 14
DMA Base + 16
DMA Base + 18
See Section 16.2.5 RISC Configuration and Control Registers for more
information.
the requested mode (falling edge/any edge).
Options Register for more information.
ADDRESS
* Modified by the IDMA controller during operation and must be reinitialized before starting a
new IDMA transaction.
DMA base = (IMMR & 0xFFFF0000) + 0x3CC0 (IDMA1).
All references to registers in the parameter RAM table are actually implemented in the dual-port RAM area as
a memory-based register.
Table 16-22. Single-Buffer Mode Parameter RAM Map
L_CNT*
Freescale Semiconductor, Inc.
DCMR*
BAPR*
FBAR*
NAME
NFLD*
BPLR
BCR*
RBR
RES
LCR
RES
For More Information On This Product,
MPC823 REFERENCE MANUAL
Half-Word
Half-Word
Half-Word
Half-Word
Half-Word
Half-Word
WIDTH
Word
Word
Word
Word
Word
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DMA Channel Mode Register
Buffer Address Pointer
Byte Count Register
DESTINATION ADDRESS GENERATION MODE
PROGRESSIVE
Not Assigned
Not Assigned
Not Assigned
Not Assigned
Not Assigned
Not Assigned
Reserved
Reserved
Current Buffer Address Pointer
Lines Per Field Count Register
DMA Channel Mode Register
Field Base Address Register
Number of Fields Register
Bytes Per Line Register
Current Bytes Per Line
Raw Bytes Register
Current Line Count
INTERLACED
Reserved
Reserved
MOTOROLA

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