mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 946

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.14.11 Port D Registers
Port D has three 16-bit, memory-mapped, read/write control registers.
16.14.11.1 PORT D DATA REGISTER. A read of the port D data (PDDAT) register returns
the data on the pins, regardless of whether the pins are an input or an output. This allows
output conflicts to be found on the pins by comparing the written data with the data on the
pins. A write to the PDDIR is latched, and if that bit in the PDDIR is configured as an output,
the value latched for that bit will be driven onto its respective pin. PDDAT can be read or
written at any time. PDDAT is not initialized and is undefined by reset.
Bits 0–2—Reserved
These bits are reserved and must be set to 0.
D3–15—Data Pins 3–15
These bits contain data can be read or written from the port D pins.
16.14.11.2 PORT D DATA DIRECTION REGISTER. The port D data direction register
(PDDIR) is cleared at system reset.
Bits 0–2—Reserved
These bits are reserved and must be set to 0.
DR3–DR15—Data Direction Pins 3–15
PDDAT
PDDIR
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = The corresponding pin is an input.
1 = The corresponding pin is an output.
0
0
RESERVED
RESERVED
R/W
R/W
—
1
1
0
2
2
Freescale Semiconductor, Inc.
R/W
DR3
R/W
For More Information On This Product,
D3
—
3
3
0
R/W
DR4
R/W
D4
—
MPC823 REFERENCE MANUAL
4
4
0
Go to: www.freescale.com
R/W
DR5
R/W
D5
—
5
5
0
(IMMR & 0xFFFF0000) + 0x976
(IMMR & 0xFFFF0000) + 0x970
R/W
DR6
R/W
D6
—
6
6
0
DR7
R/W
R/W
D7
—
7
7
0
DR8
R/W
R/W
D8
—
8
8
0
DR9 DR10 DR11 DR12 DR13 DR14 DR15
R/W
R/W
D9
—
9
9
0
D10
R/W
R/W
10
10
—
0
D11
R/W
R/W
11
11
—
0
R/W
R/W
D12
12
—
12
0
R/W
R/W
D13
13
—
13
0
MOTOROLA
R/W
R/W
D14
14
14
—
0
R/W
R/W
D15
15
15
—
0