mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 957

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

IEN—Interrupt Enable
This bit is a master enable for the CPM interrupts.
SPS—Spread Priority Scheme
This bit selects the relative USB and SCCx priority scheme and cannot be changed
dynamically.
16.15.5.2 CPM INTERRUPT PENDING REGISTER. Each bit in the 32-bit read/write CPM
interrupt pending register (CIPR) indicates which CPM interrupt sources require interrupt
service. When a CPM interrupt is received, the CPM interrupt controller sets the
corresponding bit in the CIPR.
In a vectored interrupt scheme, the CPM interrupt controller clears the bit in the CIPR that
corresponds to the current interrupt when the core acknowledges the interrupt. The core
acknowledges the interrupt by setting the IACK bit in the CIVR. The vector number that
corresponds to the CPM interrupt source is then available to the core in the CIVR. However,
the CIPR bit is not cleared if an event register exists for that interrupt source. Event registers
only exist for interrupt sources that have multiple source events. For example, the serial
communication controllers have multiple events that cause SCCx interrupts.
CIPR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = CPM interrupts are disabled.
1 = CPM interrupts are enabled.
0 = Grouped. The USB and SCCs are grouped by priority at the top of the table.
1 = Spread. The USB and SCCs are spread by priority in the table.
PC15
PC11
R/W
R/W
16
0
0
0
PC10
USB
R/W
R/W
17
1
0
0
SCC2
RES
R/W
R/W
18
2
0
0
Freescale Semiconductor, Inc.
TIMER
SCC3
For More Information On This Product,
R/W
R/W
19
3
0
3
0
RES
R/W
PC9
R/W
20
MPC823 REFERENCE MANUAL
4
0
0
Go to: www.freescale.com
PC14
R/W
PC8
R/W
21
5
0
0
TIMER
R/W
PC7
R/W
22
6
1
0
0
(IMMR & 0xFFFF0000) + 0x944
(IMMR & 0xFFFF0000) + 0x946
PC13
RES
R/W
R/W
23
7
0
0
TIMER
PC12
R/W
R/W
24
8
0
4
0
SDMA
R/W
PC6
R/W
25
9
0
0
Communication Processor Module
IDMA1
R/W
R/W
10
26
SPI
0
0
IDMA2
SMC1
R/W
R/W
11
27
0
0
SMC2
RES
R/W
R/W
12
28
0
0
TIMER
R/W
PC5
R/W
13
29
2
0
0
R–TT
R/W
PC4
R/W
14
30
0
0
16-505
RES
R/W
R/W
15
31
I2C
0
0