mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 818

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.10.8.3 USB TRANSMIT BUFFER DESCRIPTOR. Data to be transmitted with the USB
is presented to the communication processor module by arranging it in buffers referenced
by the transmit (TX) buffer descriptor ring. The first word of the TX buffer descriptor contains
status and control bits.
R—Ready
Bits 1, 10 and 15—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: You are only responsible for initializing the items in bold.
BIT
0 = The data buffer associated with this buffer descriptor is not ready for transmission.
1 = The data buffer, which you have prepared for transmission, has not been
0 = This is not the last buffer descriptor in the TX buffer descriptor table.
1 = This is the last buffer descriptor in the TX buffer descriptor table. After this buffer
0 = No interrupt is generated after this buffer has been serviced.
1 = The TXB or TXEx bit in the USB event register is set when this buffer is serviced.
You are free to manipulate this buffer descriptor or its associated data buffer. The
communication processor module clears this bit after the buffer has been
transmitted or after an error condition is encountered.
transmitted or is currently being transmitted. You cannot write to the fields of this
buffer descriptor once this bit is set.
has been used, the communication processor module will transmit incoming data
from the first buffer descriptor in the table (the buffer descriptor pointed to by
TBASEx). The number of TX buffer descriptors in this table is programmable and
is determined only by the W bit and the overall space constraints of the dual-port
RAM.
TXB and TXEx can cause interrupts if they are enabled.
R
0
Note: The communication processor module sets all the status bits in this buffer
RES
1
W
descriptor, but you must clear them before submitting the buffer descriptor to the
communication processor module.
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Freescale Semiconductor, Inc.
For More Information On This Product,
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MPC823 REFERENCE MANUAL
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Go to: www.freescale.com
TC
5
TX DATA BUFFER POINTER
CNF LSP
6
DATA LENGTH
7
8
PID
9
RES NAK STAL
10
11
12
TO
13
MOTOROLA
UN
14
RES
15