mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 543

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Follow these steps to perform an IDMA transfer:
16.6.3.1 AUTOBUFFER AND BUFFER CHAINING. The host CPU must initialize the
IDMA buffer descriptor ring with the appropriate buffer handling mode, source address,
destination address, and block length.
The data associated with each IDMA channel for autobuffer and buffer chaining modes is
stored in buffers and each buffer is referenced by a buffer descriptor that uses a ring
structure located in the dual-port RAM.
1. Define the source (peripheral) address to be burst aligned.
2. Define the destination address to be burst aligned.
3. Program the IDMA mode register (DCMR) to 0x0000.
SOURCE DEVICE OR
SOURCE DEVICE OR
SOURCE DEVICE OR
SOURCE DEVICE OR
DATA BUFFER 2
DATA BUFFER N
DATA BUFFER 1
DATA BUFFER 0
ADDRESS (IBASE)
IDMA BD BASE
Figure 16-38. IDMA Buffer Descriptor Ring
Freescale Semiconductor, Inc.
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MPC823 REFERENCE MANUAL
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BD 0
BD 1
BD 2
BD N
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Communication Processor Module
DESTINATION DEVICE
DESTINATION DEVICE
DESTINATION DEVICE
DESTINATION DEVICE
OR DATA BUFFER 0
OR DATA BUFFER 1
OR DATA BUFFER 2
OR DATA BUFFER N
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