mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 406

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Memory Controller
CST3—Chip-Select Timing 3
This bit defines the state of the CSx signal during clock phase 4.
BST4—Byte-Select Timing 4
This bit defines the state of the BSx signal during clock phase 1.
BST1—Byte-Select Timing 1
This bit defines the state of the BSx signal during clock phase 2.
BST2—Byte-Select Timing 2
This bit defines the state of the BSx signal during clock phase 3.
BST3—Byte-Select Timing 3
This bit defines the state of the BSx signal during clock phase 4.
G0L—General-Purpose Line 0 Lower
This field defines the state of the GPL0 signal during clock phases 1 through 3.
0 = The CSx signal is asserted at the trailing edge of GCLK1.
1 = The CSx signal is negated at the trailing edge of GCLK1.
0 = The BSx signal is asserted at the trailing edge of GCLK2.
1 = The BSx signal is negated at the trailing edge of GCLK2.
0 = The BSx signal is asserted at the rising edge of GCLK1.
1 = The BSx signal is negated at the rising edge of GCLK1.
0 = The BSx signal is asserted at the rising edge of GCLK2.
1 = The BSx signal is negated at the rising edge of GCLK2
0 = The BSx signal is asserted at the trailing edge of GCLK1.
1 = The BSx signal is negated at the trailing edge of GCLK1.
10 = The GPL0 signal is asserted at the trailing edge of GCLK2.
11 = The GPL0 signal is negated at the trailing edge of GCLK2.
00 = The GPL0 signal is driven at the trailing edge of GCLK2 as defined in the G0CLx
field of the MxMR.
Note: The state of each BSx signal depends on the value of each BSTx bit and three
other parameter values—the PS field in the selected base register and the TSIZx
and A[30:31] signals in the currently accessed cycle.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
MOTOROLA