mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1012

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
LCD Controller
18.4 REGISTER MODEL
18.4.1 LCD Controller Configuration Register
The 32-bit, memory mapped, read/write LCD controller configuration register (LCCR) holds
the mode and configuration parameters that you can use to operate your LCD panel.
BNUM—Number of Bursts
This field contains the number of burst cycles required for one refresh cycle.
EIEN—Exception Interrupt Enable
IEN—Interrupt Enable
IRQL—Interrupt Request Level
This field contains the priority request level of the LCD controller’s interrupt that is sent to
the system interface unit. Refer to Section 12.3.3 Programming the Interrupt Controller
for more information. This will generate an interrupt request level with a vector in the SIVEC
register if enabled with the SIMASK register. Both EOF and the exception interrupts use the
same request level.
CLKP—Clock Polarity
LCCR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = The underrun or bus error interrupt is disabled.
1 = The underrun or bus error interrupt is enabled.
0 = The end-of-frame interrupt is disabled.
1 = The end-of-frame interrupt is enabled.
0 = The SHIFT/CLK pin polarity is active high.
1 = The SHIFT/CLK pin polarity is active low.
R/W
IEN
16
0
0
17
1
IRQL
R/W
18
2
0
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
CLKP
R/W
20
MPC823 REFERENCE MANUAL
4
0
Go to: www.freescale.com
OEP
R/W
21
5
0
(IMMR & 0xFFFF0000) + 0x840
(IMMR & 0xFFFF0000) + 0x842
HSP
R/W
22
6
0
BNUM
R/W
VSP
R/W
23
7
0
0
R/W
DP
24
8
0
25
9
BPIX
R/W
0
10
26
LBW
R/W
11
27
0
SPLT CLOR
R/W
12
28
0
R/W
13
29
0
MOTOROLA
R/W
TFT
14
30
0
EIEN
PON
R/W
R/W
15
31
0
0

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