mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 711

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

16.9.17.2.2 Delaying RTS Mode. Sometimes the HDLC bus can be used in a configuration
with a local HDLC bus and a standard transmission line that is not an HDLC bus. This
situation is illustrated in Figure 16-84. The local HDLC bus controllers do not communicate
with each other, but with a station on the transmission line; yet the HDLC bus protocol is
used to control access to the transmission line.
Normally, the RTSx pin goes active at the beginning of the opening flag’s first bit. Although
using the RTSx pin is not required, there is a mode on the MPC823 HDLC bus that delays
the RTSx signal by one bit. This mode is selected with the BRM bit in the PSMR–SCC HDLC
register.
Delayed RTSx mode is useful when the HDLC bus connects multiple local nodes to a
transmission line. If the transmission line driver has a one-bit delay, then the delayed RTSx
line can be used to enable the output of the transmission line driver. The result is that the
transmission line bits always drive “clean” and without any collisions. RTSx timing is
illustrated in Figure 16-85.
TX
RX
NOTES:
1. The TXDx pins of slave devices should be configured to open-drain in the port C parallel I/O port.
2. The RTSx pins of each HDLC bus controller are configured to delayed RTSx mode.
LINE
DRIVER
(1-BIT DELAY)
Figure 16-84. HDLC Bus Transmission Line Configuration
EN
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
RTSx
Go to: www.freescale.com
RXDx
CONTROLLER
HDLC BUS
LOCAL HDLC BUS
TXDx
A
CTSx
Communication Processor Module
RTSx
RXDx
CONTROLLER
HDLC BUS
TXDx
B
CTSx
R
+5
16-259