mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 486

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.3.3.4 DSP MASK REGISTER. The 8-bit read/write SDMA mask register (SDMR) is
used to mask the DSP interrupts and has the same bit format as the SDSR. If a bit in the
SDMR is a 1, the corresponding interrupt in the SDSR is enabled and if it is zero, the
corresponding interrupt is masked. This register is cleared by reset.
SBER—SDMA Channel Bus Error (SDMA function)
Bits 1–5—Reserved
These bits are reserved and must be set to 0.
DSP1—DSP Chain 1 Receiver Interrupt (DSP function)
DSP2—DSP Chain 2 Transmitter Interrupt (DSP function)
SDMR
RESET
FIELD
ADDR
R/W
BIT
0 = Disable the interrupt.
1 = Enable the interrupt.
0 = Disable the DSP chain 1 interrupt.
1 = Enable the DSP chain 1 interrupt.
0 = Disable the DSP chain 2 interrupt.
1 = Enable the DSP chain 2 interrupt.
SBER
R/W
0
0
Freescale Semiconductor, Inc.
1
For More Information On This Product,
MPC823 REFERENCE MANUAL
2
Go to: www.freescale.com
(IMMR & 0xFFFF0000) + 0x90C
RESERVED
R/W
3
0
4
5
DSP2
R/W
6
0
MOTOROLA
DSP1
R/W
7
0