mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 675

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
CM—Continuous Mode
P—Preamble
NS—No Stop Bit Transmitted
CT—CTSx Lost
The communication processor module writes this bit after it finishes transmitting the
associated data buffer.
DATA LENGTH
This field represents the number of octets that the communication processor module must
transmit from this buffer descriptor data buffer. It is never modified by the communication
processor module. Normally, this value must be greater than zero. DATA LENGTH can be
equal to zero if the P bit set and only a preamble is sent. The communication processor
module writes these bits after it finishes transmitting the associated data buffer.
TX DATA BUFFER POINTER
This field always points to the first location of the associated data buffer and can be even or
odd. The buffer can reside in internal or external memory. The communication processor
module writes these bits after it finishes transmitting the associated data buffer.
0 = Normal operation.
1 = The communication processor module does not clear the R bit after this buffer
0 = No preamble sequence is sent.
1 = The SCCx UART controller sends one character that consists of all ones before it
0 = Normal operation. Stop bits are sent with all characters in this buffer.
1 = By setting the SYN bit in the PSMR–SCC UART register, the data in this buffer is
0 = The CTSx signal remains asserted during transmission.
1 = The CTSx signal is negated during transmission.
descriptor is closed, thus allowing the associated data buffer to be automatically
retransmitted next time the communication processor module accesses this buffer
descriptor. However, the R bit is cleared if an error occurs during transmission,
regardless of how the CM bit is set.
sends the data so that the other remote receiver can detect an idle line before the
data. If this bit is set and the data length of this buffer descriptor is zero, only a
preamble is sent.
sent without stop bits if the Sync mode is selected. If Async is selected, the stop bit
is transmitted as defined by the FSB field in the general DSR, as described in
Section 16.9.4 Data Synchronization Register .
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
16-223

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