mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 938

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.14.7 Port B Configuration Example
You can configure the PB31 pin as a general-purpose I/O or open-drain pin. It can also be
the LCD_A pin for the LCD controller or the SPI select input SPISEL pin. If PB31 is not
configured to connect to the LCD_A or SPISEL signal, then the serial peripheral interface
receives V
16.14.8 Port C Pin Functionality
Port C consists of 12 general-purpose I/O pins that have interrupt capability. Refer to
Table 16-43 for a description of all port C pin options.
All PCDIR and PCPAR bits are cleared by a total system reset, which configures all port pins
as general-purpose input pins. Notice that the global CPM interrupt mask register is also
cleared when a total system reset occurs, so if any port C pin is left floating it does not cause
a false interrupt.
If a port C pin is selected as a general-purpose I/O pin, it can be accessed through the
PCDAT register where written data is stored in an output latch. If a port C pin is configured
as an output, the output latch data is gated onto the port pin. When the PCDAT register is
read, the port pin itself is read. If a port C pin is configured as an input, data written to PCDAT
register is still stored in the output latch, but is prevented from reaching the port pin. In this
case, when PCDAT register is read, the state of the port pin is read.
SIGNAL
PC15
PC14
PC13
PC12
PC11
PC10
PC9
PC8
PC7
PC6
PC5
PC4
DD
PCDIR = 1 OR
on that signal.
PCSO = 0
Port C15
Port C14
Port C13
Port C12
Port C11
Port C10
Port C9
Port C8
Port C7
Port C6
Port C5
Port C4
PCPAR = 0
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 16-43. Port C Pin Assignment
PCDIR = 0 AND
MPC823 REFERENCE MANUAL
PCSO = 1
USBRXN
USBRXP
DREQ1
DREQ2
CTS2
CTS3
CD2
CD3
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—
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—
—
L1TSYNCA
PCDIR = 0
L1RQA
RTS2
RTS3
—
—
L1RSYNCA
PCPAR = 1
USBTXN
TGATE1
TGATE1
—
—
PCDIR = 1
USBTXP
SDACK1
L1ST5
L1ST6
L1ST7
L1ST8
INPUT TO ON-CHIP
PERIPHERALS
EXT0 = VDD
EXT1 = VDD
CD3 = GND
GND
GND
GND
GND
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MOTOROLA