mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 823
mpc823rg
Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC823RG.pdf
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THS—Transmit Handshake (Slave Mode Only)
RHS—Receive Handshake (Slave Mode Only)
16.10.8.7 USB BUFFER DESCRIPTOR RING. The data associated with the USB channel
is stored in buffers that are referenced by buffer descriptors organized in buffer descriptor
rings located in the dual-port RAM. These rings have the same basic configuration as those
used by the serial communication controllers and serial management controllers. There are
four separate transmit buffer descriptor rings and four separate receive buffer descriptor
rings for each endpoint, as illustrated in Figure 16-112.
The buffer descriptor ring allows you to define buffers for transmission and reception. Each
buffer descriptor ring forms a circular queue. The communication processor module
confirms reception and transmission or indicates error conditions using the buffer
descriptors to inform the processor that the buffers have been serviced. The actual buffers
can reside in either external or internal memory. Data buffers can reside in the parameter
RAM of a serial communication controller if it is not enabled.
00 = Normal handshake.
01 = Ignore IN token.
10 = Force NAK handshake. Not allowed for control endpoint.
11 = Force STALL handshake. Not allowed for control endpoint.
00 = Normal handshake.
01 = Ignore OUT token.
10 = Force NAK handshake. Not allowed for control endpoint.
11 = Force STALL handshake. Not allowed for control endpoint.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
16-371
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