mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 788

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
NIB—Number of Ignored Bits
This parameter determines how soon after RENA assertion the SCCx Ethernet controller
must begin looking for the start frame delimiter. In most situations, it is recommended that
you select 22 bits.
FDE—Full-Duplex Ethernet
000 = Begin searching for the SFD 13 bits after the assertion of RENA.
001 = Begin searching for the SFD 14 bits after the assertion of RENA.
010 = Begin searching for the SFD 15 bits after the assertion of RENA.
011 = Begin searching for the SFD 16 bits after the assertion of RENA.
100 = Begin searching for the SFD 21 bits after the assertion of RENA.
101 = Begin searching for the SFD 22 bits after the assertion of RENA.
110 = Begin searching for the SFD 23 bits after the assertion of RENA.
111 = Begin searching for the SFD 24 bits after the assertion of RENA.
0 = Disable full-duplex Ethernet mode.
1 = Enable full-duplex Ethernet mode.
Note: When this bit is set to 1, you must also set the LPB bit to 1.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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