mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 336

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
External Bus Interface
At system reset, the MPC823 can be configured to use the internal bus arbiter and it will be
parked on the bus. The priority of the external device relative to the internal MPC823 bus
masters is programmed in the SIUMCR, as described in Section 12.12.1.1 SIU Module
Configuration Register . If the external device requests the bus and the MPC823 does not
need it or the external device has priority over the current internal bus master, the MPC823
grants the bus to the external device. Figure 13-23 illustrates the internal finite state
machine that implements the arbiter protocol.
CLKOUT
BR0
BG0
BR1
BG1
BB
ADDR + ATTR
TS
TA
Figure 13-22. Bus Arbitration Timing Diagram
Freescale Semiconductor, Inc.
For More Information On This Product,
“TURNS ON”
MASTER 0
MPC823 REFERENCE MANUAL
SIGNALS
DRIVES
AND
Go to: www.freescale.com
“TURNS OFF”
MASTER 0
NEGATES
AND
BB
“TURNS ON”
MASTER 1
SIGNALS
DRIVES
AND
MOTOROLA

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