mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 150

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

The PowerPC Core
6.4.1.2 P
6.4.1.2.1 Machine State Register. The 32-bit machine state register (MSR) defines the
state of the processor. It can be read by the mfmsr instruction. However, it can be modified
by the mtmsr, sc, and rfi instructions, as well as the hard reset configuration word. Refer to
Section 4.3.1.1 Hard Reset Configuration Word for more information.
Bits 0–12—Reserved
These bits are reserved and must be set to 0. Bits 0, 5, and 9 are loaded from the
corresponding bit in the MSR when an interrupt is taken. The appropriate bit in the MSR is
loaded from this bit when an rfi is executed. Reserved bits in the MSR are set from the
source value on write and return the value last set for it on read.
POW—Power Management Enable
When this bit is set, it allows you to automatically switch between low and high frequency
operation or between normal low mode and normal high mode. When this bit is cleared,
power management is disabled. Refer to Section 5 Clocks and Power Control for more
information on bus power management.
Bit 14—Reserved
This bit is reserved and must be set to 0.
ILE—Interrupt Little-Endian Mode
When an exception occurs, this bit is copied into the MSR to select the endian mode for the
context established by the exception.
EE—External Interrupt Enable
This bit is loaded from the corresponding bit in the MSR when an interrupt is taken. The
appropriate bit in the MSR is loaded from this bit when an
MSR
NOTE: — = Undefined.
RESET
RESET
FIELD
FIELD
R/W
R/W
BIT
BIT
0 = Big-endian mode is selected.
1 = Little-endian mode is selected.
OWER
R/W
EE
16
0
0
R/W
PC STANDARD CONTROL REGISTER BIT ASSIGNMENT
PR
17
1
0
R/W
FP
18
2
0
Freescale Semiconductor, Inc.
R/W
For More Information On This Product,
ME
19
3
0
R/W
FE0
20
MPC823 REFERENCE MANUAL
4
0
Go to: www.freescale.com
R/W
SE
21
5
0
RESERVED
R/W
R/W
BE
22
6
0
0
R/W
FE1
23
7
0
RES
R/W
24
8
0
R/W
25
IP
—
9
R/W
is executed.
10
26
IR
0
R/W
DR
11
27
0
RESERVED
12
28
R/W
—
POW RES
R/W
13
29
0
MOTOROLA
R/W
R/W
14
30
RI
0
0
R/W
R/W
ILE
15
31
LE
0
0