mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 740

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
Logical “1” represents a chip duration when the transmitting LED is emitting light, while
logical “0” represents a chip duration when the LED is off. Data encoding for transmission is
done LSB first. The 4PPM data encoding defines only the legal encoded payload data
symbols. All other 4-chip combinations are by definition illegal symbols for encoded payload
data. Some of these illegal symbols are used in the definition of the packet envelope
(preamble, start flag, stop flag) because they are unambiguously not data.
16.9.20.3.2 Data Link Layer. The data link layer protocol defines the following packet
format.
The preamble (PA) field is used by the receiver to establish bit synchronization. The PA field
consists of exactly sixteen repeated transmissions of the following stream of symbols.
On the receive side, the PA field does not need to be valid in the received packet. After the
PA field, the receiver starts searching for the start flag (STA) to establish symbol
synchronization. After the start flag is received, the receiver can begin interpreting the data
symbols in the link layer frame. The start flag consists of exactly one transmission of the
following stream of symbols.
0000
1100
Figure 16-97. Preamble Field Symbol Format
Freescale Semiconductor, Inc.
Figure 16-96. High-Speed Packet Format
Figure 16-98. Start Flag Symbol Format
For More Information On This Product,
PA
1000
0000
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
STA
0000
1100
LINK LAYER
1010
0110
FRAME
0000
1000
STO
0110
0000
MOTOROLA