mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 141

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.3.5 Processing an Interrupt
The following table provides the significant events that occur when processing an interrupt.
MNEMONIC
NOTES:
NRI
EIE
EID
D
TIME POINT
B + 3 Clocks
1.
2.
3.
4.
5.
C
A
B
E
At time point A an instruction that will cause an interrupt is issued.
all instructions preceding it in the code stream have finished execution without generating any interrupt.
Also, the excepting instruction itself has completed execution. At this time the exception is “recognized”
and exception processing begins. If, at this point, the instruction had not generated an exception, it
would have been retired.
machine is restored to its state at time.
saved and control has been transferred to the interrupt handler routine.
At time point B the excepting instruction has reached the head of the history queue, thus implying that
At time point C the sequencer starts to fetch the interrupt handler’s first instruction.
By time point D the state of the machine prior to the issue of the excepting instruction is restored (the
At time point E the machine state register and instruction pointer of the executing process have been
SPR
80
81
82
Table 6-3. Special Ports to Machine State Register Bits
Start Fetch
Handler
MSR
FETCH
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1
0
0
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EE
Table 6-4. Interrupt Latency
MPC823 REFERENCE MANUAL
MSR
Faulting Instruction
First Instruction of
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1
1
0
Handler Issued
RI
ISSUE
Issue
External Interrupt Enable:
Interrupts
External Interrupt Disable, But Other Interrupts Are Recoverable:
Nonrecoverable Interrupt:
End of Interrupt Handler’s Prologue, Enable Nested
External Interrupts;
End of Critical Code Segment in Which External
Were Disabled
End of Interrupt Handler’s Prologue, Keep External
Nested Interrupts Disabled;
Start of Critical Code Segment in Which External
Interrupts Are Disabled
Start of Interrupt Handler’s Epilogue
INSTRUCTION COMPLETE
Instructions Complete
Instruction Complete
and All Previous
USED FOR
The PowerPC Core
KILL PIPELINE
Kill Pipeline
6-11

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