mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 250

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

11.6.1.10 MMU INSTRUCTION TABLEWALK CONTROL REGISTER. The MMU
instruction tablewalk control (MI_TWC) register contains the access protection group and
page size of the entry to be loaded into the translation lookaside buffer.
Bits 0–22 and 30—Reserved
These bits are reserved and must be set to 0. Ignores on write and returns a 0 on read.
APG—Access Protection Group
A maximum of 16 protection groups are supported. The default value of instruction TLB miss
is 0.
G—Guarded Storage Attribute for Entry
Default value on instruction TLB miss is 0.
PS—Page Size Level One
Default value on instruction TLB miss is 00.
MI_TWC
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = Unguarded storage.
1 = Guarded storage.
00 = Small (4K or 16K).
01 = 512K.
11 = 8M.
10 = Reserved.
16
0
17
1
18
2
RESERVED
Freescale Semiconductor, Inc.
R/W
For More Information On This Product,
19
3
0
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
22
6
RESERVED
23
SPR 789
SPR 789
7
R/W
0
24
8
APG
R/W
—
25
9
10
26
R/W
11
27
—
G
Memory Management Unit
12
28
R/W
PS
—
13
29
RES
R/W
14
30
0
11-33
R/W
15
31
—
V