mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 479

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.3.2.1 HARDWARE. The RISC microcontroller’s hardware contains special DSP
processing units, such as a multiplier and accumulator that is capable of handling real or
complex numbers, and an address generator that can access cyclic buffer structures in
dual-port RAM.
16.3.2.2 SOFTWARE. Your software interfaces to the DSP via the function descriptor that
is described in system memory. The function descriptor defines the sequence and data flow
of your DSP task.
16.3.2.3 FIRMWARE. The RISC microcontroller’s firmware is a set of DSP functions that
have been compiled to form a library of basic building blocks and each function within the
library is implemented by a microcode routine stored in the internal ROM. In addition, a
software interface is defined that enables parameters to be passed between the core and
communication processor module. Several functions can be chained together to reduce
software intervention and interrupt rates, assuming that all data structures reside in the
dual-port RAM. Table 16-6 lists the DSP functions that are included in the library.
16.3.3 Programming the DSP Functions
Similar to the serial communication controller buffer descriptor, a function descriptor (FD) is
used to specify the DSP function and pass the parameters. A table of such descriptors forms
a circular queue with a programmable length. The descriptors are stored in external
memory. There are two function descriptor tables (also referred to as chains)—one for the
transmitter and one for the receiver. The core prepares a chain of function descriptors in the
system memory and a special host command notifies the RISC microcontroller when to
execute the chain. A maskable interrupt is generated once the chain is completed. As
illustrated in Figure 16-8, the pointer to the transmit (TX) chain must be written into the
FDBASE field of the DSP2 parameter RAM and the pointer to the receive (RX) chain must
be written into DSP1.
FUNCTION
DEMOD
WADD
LMS1
LMS2
MOD
FIR1
FIR2
FIR3
FIR5
FIR6
IIR
OPCODE
00001
00010
00011
00011
00110
00111
01000
01001
01010
01011
01100
Complex
Complex
Complex
Complex
Freescale Semiconductor, Inc.
INPUT
Real
Real
Real
Real
Real
For More Information On This Product,
Table 16-6. DSP Functions
MPC823 REFERENCE MANUAL
COEFFICIENT
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Complex
Complex
Complex
Complex
Complex
Real
Real
Real
Real/Complex
Real/Complex
Real/Complex
OUTPUT
Complex
Complex
Complex
Real
Real
Real
Communication Processor Module
EC Update, Equalizer Update (T/2, T/3)
Fractionally Spaced Equalizer
Decimation, RX Interpolation
EC Computation, Equalizer
Equalizer Update (2T/3)
TX Filter, RX Filter
RX Demodulation
APPLICATION
TX Modulation
Biquad Filter
Interpolation
16-27

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