mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 708

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
In single-master configuration, a master station transmits to any slave station without any
collisions. The slaves only communicate with the master, but can experience collisions in
their access over the bus. In this configuration, a slave that communicates with another
slave must first transmit its data to the master, where the data is buffered in RAM and then
retransmitted to the other slave. The benefit of this configuration, however, is that full-duplex
operation can be obtained. In a point-to-multipoint environment, this is the preferred
configuration. Figure 16-81 illustrates the single-master configuration.
16.9.17.1 FEATURES.The following list contains the main features of the HDLC bus:
• Superset of the SCCx in HDLC mode
• Automatic HDLC bus access
• Automatic retransmission in case of a collision
• May be used with the NMSI mode or a TDM bus
• Delayed RTSx mode
NOTES:
1. Transceivers may be used to extend the LAN size, if necessary.
2. The TXDx pins of slave devices must be configured to open-drain in the port C parallel I/O port.
RXDx
CONTROLLER
Figure 16-81. Typical HDLC Bus Single-Master Configuration
MASTER
HDLC
TXDx
A
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HDLC BUS LAN
RXDx
CONTROLLER
HDLC BUS
SLAVE
TXDx
B
CTSx
RXDx
CONTROLLER
HDLC BUS
SLAVE
TXDx
C
CTSx
R
+5
MOTOROLA