mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 350

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
External Bus Interface
When a burst access is initiated by the MPC823, the bus interface only recognizes the
RETRY assertion as a retry termination if it detects it before the first data beat is
acknowledged by the slave device. When the RETRY signal is asserted as a termination
signal on the second or third data beat of the access, the MPC823 recognizes it as a transfer
error acknowledgement. If a “non burst” access to a small port size device is initiated by the
MPC823, the transfer size of the access is bigger than the slave port size, and the first
transfer of this access is normally acknowledged by the assertion of TA, the MPC823
initiates the following “single beat” transfers to complete the access and recognize the
RETRY assertion as a transfer error acknowledge.
CLKOUT
BR
BG(OUTPUT)
BB
A[6:31]
RD/WR
TSIZ[0:1]
BURST
TS
DATA
TA
RETRY
BI
Freescale Semiconductor, Inc.
For More Information On This Product,
A
Figure 13-30. Retry On Burst Cycle
MPC823 REFERENCE MANUAL
CAUSE TRANSFER ERROR
Go to: www.freescale.com
IF ASSERTED WILL
ALLOW EXTERNAL MASTER
TO GAIN THE BUS
A
MOTOROLA

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