mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 156

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The PowerPC Core
To execute multiple (lmw, stmw) instructions, string instructions, and unaligned accesses,
the load/store unit contains an address incrementor that generates the needed addresses.
This allows the unit to execute the unaligned accesses without stalling the master instruction
pipeline.
6.6.1 Issuing Load/Store Instructions
When load or store instructions are encountered, the load/store unit checks the scoreboard
to determine if all of the operands are available. These operands include:
If all operands are available, the load/store unit takes the instruction and enables the
sequencer to issue a new instruction. Then, using a dedicated interface, the load/store unit
notifies the integer unit of the need to calculate the effective address. All load/store
instructions are executed and terminated in order.
• Address register operands
• Source data register operands (for store instructions)
• Destination data register operands (for load instructions)
• Destination address register operands (for load/store with update instructions)
INCREMENT
ADDRESS
ADDRESS
QUEUE
FIXED-POINT
AND
Figure 6-6. Load/Store Unit Functional Block Diagram
UNIT
Freescale Semiconductor, Inc.
32
32
For More Information On This Product,
LOAD / STORE UNIT
MPC823 REFERENCE MANUAL
REGISTERS FILE
32
FIXED-POINT
Go to: www.freescale.com
LOAD DATA
D-CACHE / D-MMU
FIXED-POINT
INTERFACE
32
FIXED-POINT
QUEUE
DATA
CORE
32
FIXED-POINT
STORE DATA
32
MOTOROLA

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