mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 444

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Memory Controller
15.7.2 Page Mode Extended Data-Out DRAM Interface Example
The configuration for a 1M, 32-bit wide memory system using two 256K x 16-bit page mode
extended data-out (EDO) DRAMs is illustrated in Figure 15-51. Also shown is the physical
connection between UPMB and the EDO DRAMs. The CS2 signal that is controlled by the
base register is connected to both of the RAS signals. The BS_B[0:1] signals are mapped
to the lower DRAM (D[0:15]) and the BS_B[2:3] signals are mapped to the upper DRAM
(D[16:31]). For this connection, GPL_B1 is connected to the memory device OE pins. The
refresh rate is calculated based on a 25MHz baud rate generator clock and the DRAM that
requires a 512-cycle refresh every 8ms.
Follow these steps to configure a system for EDO DRAM:
1. Determine the system architecture, which includes the MPC823 and the memory
2. Use the blank worksheet (Figure 15-58) to draw the timing diagrams for all the memory
3. Translate the timing diagrams into RAM words for each type of memory access. The
system as shown in the example in Figure 15-52.
cycles associated with your architecture. You can also use, as a reference, the various
timing diagrams in Figure 15-52 through Figure 15-57.
bottom half of the figures represent the RAM array contents that handle each of the
possible cycles and each column represents a different word in the RAM array. A
blank cell in each figure indicates a “don’t care” bit, which is typically programmed to
logic 1 to conserve power.
MPC823
BS_B[0:3]
GPL_B1
A[21:29]
D[0:31]
Figure 15-51. EDO DRAM Interface Connection
CS2
R/W
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
BS_B0
BS_B1
2
RAS
CASL
WE
OE
A[0:8]
CASH
D[0:15]
MT4C16270
256K X 16
D[0:15]
16
BS_B3
BS_B2
2
RAS
CASL
WE
OE
A[0:8]
CASH
D[16:31]
MT4C16270
256K X 16
D[0:15]
16
MOTOROLA

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