mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1260

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
mullw
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
18
B
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
mullw.
mullwo
mullwo.
order 32 bits of the 64-bit product (rA) * (rB) are placed into rD.
The low-order 32 bits of the product are the correct 32-bit
product for 32-bit implementations. The low-order 32-bits of the
product are independent of whether the operands are regarded
as signed or unsigned 32-bit integers. If OE = 1, then OV is set
if the product cannot be represented in 32 bits. Both the
operands and the product are interpreted as signed integers.
Note that this instruction may execute faster on some
implementations if rB contains the operand having the smaller
absolute value.
Other registers altered:
mullw
Multiply Low Word
rD
The 32-bit operands are the contents of rA and rB. The low-
POWERPC ARCHITECTURE
20
MPC823 REFERENCE MANUAL
4
rA
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1).
The CR0 field may not reflect the “true” (infinitely precise)
result if overflow occurs (see XER below).
XER:
Affected: SO, OV (if OE = 1).
The setting of the affected bits in the XER is mode-
independent, and reflects overflow of the 32-bit result.
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OE
21
5
LEVEL
rB
UISA
rD,rA,rB (OE = 0 Rc = 0)
rD,rA,rB (OE = 0 Rc = 1)
rD,rA,rB (OE = 1 Rc = 0)
rD,rA,rB (OE = 1 Rc = 1)
22
6
23
7
24
D
8
25
9
SUPERVISOR
235
10
26
MPC823 Instruction Set—mullw
11
27
OPTIONAL
12
28
13
29
A
14
30
FORM
XO
B-107
RC
15
31

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