mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 868

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
CM—Continuous Mode
OV—Overrun
This bit indicates that a receiver overrun has occurred during message reception. The
communication processor module writes this bit after the received data is placed into the
associated data buffer.
DATA LENGTH
This field represents the number of octets that the communication processor module writes
into this data buffer. It is only written once by the communication processor module as the
buffer is closed. The communication processor module writes this field after the received
data is placed into the associated data buffer.
RX DATA BUFFER POINTER
This field always points to the first location of the associated data buffer, must be even, and
can reside in internal or external memory. The communication processor module writes
these bits after the received data is placed into the associated data buffer.
0 = This is not the last buffer descriptor in the RX buffer descriptor table.
1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer
0 = No interrupt is generated after this buffer is filled.
1 = The RX bit in the SMCE–Transparent register is set when this buffer is completely
0 = Normal operation.
1 = The E bit is not cleared by the communication processor module after this buffer
is used, the communication processor module receives incoming data into the first
buffer descriptor that RBASE points to in the table. The number of RX buffer
descriptors in this table is programmable and determined only by the W bit and
overall space constraints of the dual-port RAM.
filled by the communication processor module, thus indicating that the core needs
to process the buffer. The RX bit can cause an interrupt if it is enabled.
descriptor is closed, thus allowing the associated data buffer to be automatically
overwritten next time the communication processor module accesses this buffer
descriptor. However, the E bit is cleared if an error occurs during reception,
regardless of how the CM bit is set.
Note: The actual amount of memory allocated for this buffer must be greater than or
equal to the MRBLR entry.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
MOTOROLA