mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 304

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

MASKNUM—Mask Number
This read-only field is mask-programmed with a code corresponding to the mask number of
the part on which the system interface unit is located. It is intended to help with factory test
and user code that is sensitive to part refinements. As a result, the value of this field depends
on the mask revision.
12.12.1.3 SYSTEM PROTECTION CONTROL REGISTER. The system protection control
register (SYPCR) controls the system monitors, software watchdog period, and bus monitor
timing. This register can be read at any time, but can only be written once after system reset.
SWTC—Software Watchdog Timer Count
This field contains the count value for the software watchdog timer.
BME—Bus Monitor Enable
This bit controls the operation of the bus monitor when an internal to external bus cycle is
executed.
BMT—Bus Monitor Timing
This field defines the timeout period, in 8 system clock resolution, for the bus monitor. The
maximum timeout is 2,040 clocks.
Bits 25–27—Reserved
These bits are reserved and must be set to 0.
SYPCR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = Disable the bus monitor.
1 = Enable the bus monitor.
16
0
Note: If the bus monitor is disabled, the transfer error conditions will not assert the
17
1
18
TEA pin.
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
BMT
R/W
1
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
(IMMR & 0xFFFF0000) + 0x004
(IMMR & 0xFFFF0000) + 0x006
22
6
23
7
SWTC
R/W
1
BME
R/W
24
8
0
25
9
RESERVED
R/W
10
26
0
11
27
SWF
System Interface Unit
R/W
12
28
0
SWE SWRI SWP
R/W
13
29
1
R/W
14
30
1
12-35
R/W
15
31
1