mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 571

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.7.4.2 ONE MULTIPLEXED CHANNEL WITH DYNAMIC FRAMES. In this
configuration, there is one multiplexed channel and it has 32 entries for transmit data and
strobe routing and 32 entries for receive data and strobe routing. In each RAM, one of the
partitions is the current-route RAM and the other is a shadow RAM that allows you to change
the serial routing. After programming the shadow RAM, set the CSRRx bit of the associated
channel in the SIMCR to receive and the CSRTx bit to transmit. When the next frame sync
arrives, the serial interface automatically exchanges the current-route RAM for the shadow
RAM. Refer to Section 16.7.4.4 Serial Interface RAM Dynamic Changes for more details
on how to dynamically change the channel route. You must only use this configuration when
the routing on the time-division multiplex needs to be dynamically changed.
SERIAL INTERFACE RAM
Figure 16-47. Configuring the TDM with Dynamic Frames
(
32
BITS WIDE)
ONE CHANNEL WITH SHADOW RAM FOR DYNAMIC ROUTE CHANGE
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
ENTRY
Go to: www.freescale.com
95
64
31
0
32 ENTRIES
32 ENTRIES
ROUTE
ROUTE
RDM = 01
RX
TX
32
63
96
127
Communication Processor Module
FRAMING SIGNALS
L1RCLKx
L1RSYNCx
L1TCLK x
L1TSYNC x
16-119

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