mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1232

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
lswi
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
NB
18
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
else EA
if NB = 0 then
else
r
i
do while
if i = 32 then
r
GPR(r)
GPR(r)[i–i + 7
i
if i = 32 then i
EA
n
of bytes to load. Let nr = CEIL( n
registers to be loaded with data.
n consecutive bytes starting at EA are loaded into GPRs rD
through rD + nr – 1. Bytes are loaded left to right in each register.
The sequence of registers wraps around to r0 if required. If the
4 bytes of register rD + nr – 1 are only partially filled, the unfilled
low-order byte(s) of that register are cleared. If rA is in the range
of registers specified to be loaded, including the case in which rA
= 0, the instruction form is invalid. Under certain conditions (for
example, segment boundary crossing) the data alignment
exception handler may be invoked.
lswi
Load String Word Immediate
if rA = 0 then EA
EA is (rA|0). Let n = NB if NB 0, n = 32 if NB = 0; n is the number
20
32
i + 8
rD – 1
r + 1 (mod 32)
MPC823 REFERENCE MANUAL
4
n
n
– 1
EA + 1
Go to: www.freescale.com
n
21
NB
5
> 0
0
(rA)
rD,rA,NB
22
n
6
0
MEM(EA, 1)
32
23
7
0
24
D
8
25
9
597
4); nr is the number of
10
26
MPC823 Instruction Set—lswi
11
27
12
28
13
29
A
14
30
B-79
15
31
0

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