mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1278

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

srawi
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
SH
18
2
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31
For More Information On This Product,
19
3
srawi.
r
by operand SH. Bits shifted out of position 31 are lost. The
shifted value is sign-extended before being placed in rA. The
32-bit result is placed into rA. XER[CA] is set if rS contains a
negative number and any 1 bits are shifted out of position 31;
otherwise XER[CA] is cleared. A shift amount of zero causes
XER[CA] to be cleared.
The srawi instruction, followed by addze, can be used to divide
quickly by 2
of mode.
Other registers altered:
srawi
Shift Right Algebraic Word Immediate
n
The contents of rS are shifted right the number of bits specified
POWERPC ARCHITECTURE
20
ROTL(rS, 32 –
MPC823 REFERENCE MANUAL
4
SH
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
XER:
Affected: CA
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21
5
LEVEL
UISA
n
. The setting of the CA bit, by srawi, is independent
rA,rS,SH (Rc = 0)
rA,rS,SH (Rc = 1)
22
6
23
n
7
)
24
S
8
25
9
SUPERVISOR
824
10
26
MPC823 Instruction Set—srawi
11
27
OPTIONAL
12
28
13
29
A
14
30
FORM
X
B-125
RC
15
31