mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 114

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The low-power dividers allow you to reduce and restore the operating frequencies of
different sections of the MPC823 without losing the SPLL lock. Using the low-power dividers,
you can still obtain full chip operation, but at a lower frequency. This is called normal low
mode. You can switch to normal low mode or set the speed at any time and the changes
you make will occur immediately. The low-power dividers are controlled by the SCCR and
its default division factor is divide by one at reset. For a 40MHz system, SYNCCLK,
LCDCLK, LCDCLK50, BRGCLK, and GCLKx are all 40MHz at reset.
NORMAL OR
DOZE MODE
LOW-POWER MODE
NORMAL MODES
DFNH
DFNL
Freescale Semiconductor, Inc.
DFSYNC
DFBRG
DFLCD
DIVISION FACTOR TOTAL LESS THAN 64
For More Information On This Product,
MUX
2:1
MPC823 REFERENCE MANUAL
Figure 5-5. Clock Dividers
Go to: www.freescale.com
GCLK1
EBDF
PHASE
DFALCD
BRGCLK
GCLK2
SYNCCLK
GCLK1
PHASE
GCLK1_50
COM[0:1]
GCLK2_50
GCLK2C
GCLK1C
LCDCLK50
LCDCLK
Clocks and Power Control
CONTROLLER
LCD/VIDEO
EXTERNAL
INTERFACE
LCD PANEL
PCMCIA,
CLKOUT
UPM,
CORE
BUS
CPM
5-15

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