mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 115

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clocks and Power Control
5.3.4 Internal Clock Signals
The internal logic of the MPC823 uses the following internal clock signals:
The MPC823 also generates an external clock signal called CLKOUT. All internal clock
signals originate from the same source, so they are all synchronized to VCOOUT.
5.3.4.1 THE GENERAL SYSTEM CLOCKS. The general system clocks—GCLK1C,
GCLK2C, GCLK1, GCLK2, GCLK1_50, and GCLK2_50—are the basic clocks supplied to
all modules of the MPC823. GCLKxC is supplied to the core, data and instruction caches,
and memory management unit. It is not active when the core is in sleep or power-down
mode. GCLKx is supplied to the system interface unit, clock module, memory controller, and
most of the other blocks in the communication processor module.
The timing relationship between the general system clock signals that are shown in
Figure 5-1 is illustrated in Figure 5-6. CLKOUT, the only externally visible clock, is derived
from the GCLK2_50 signal.
• General system clocks
• Baud rate generator clock
• Synchronization clocks
• LCD clocks
GCLK1
GCLK2
GCLK1_50
(EBDF=00)
GCLK2_50
(EBDF=00)
CLKOUT
(EBDF=00)
GCLK1_50
(EBDF=01)
GCLK2_50
(EBDF=01)
CLKOUT
(EBDF=01)
Figure 5-6. MPC823 Clocks Timing Diagram
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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