mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 622

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
TEND—Transmitter Frame Ending
This bit is specifically intended for NMSI transmitter encoding of the DPLL. This bit
determines whether the TXDx signal must idle in a high state or in an encoded ones state
(high or low). It can, however, be used with other encodings besides NMSI.
TDCR—Transmit Divide Clock Rate
This field determines the divider rate of the transmitter. If the DPLL is not used, the 1x value
must be chosen, except in asynchronous UART mode, which requires 8x, 16x, or 32x to be
chosen. You must program TDCR to equal RDCR in most applications. If the DPLL is used
in the application, the selection of TDCR depends on the encoding. NRZI usually requires
1x whereas FM0/FM1, Manchester, and Differential Manchester allow 8x, 16x, or 32x. The
8x option allows highest speed, whereas the 32x option provides the greatest resolution.
TDCR is usually equal to RDCR so that the same clock frequency source can control both
the transmitter and receiver.
RDCR—Receive DPLL Clock Rate
This field determines the divider rate of the receive DPLL. If the DPLL is not used, the 1x
value must be chosen, except in asynchronous UART mode, which requires 8x, 16x, or 32x
to be chosen. You must program this field to equal TDCR in most applications.
If the DPLL is used in the application, the selection of RDCR depends on the encoding. NRZI
usually requires 1x, whereas FM0, FM1, Manchester, and Differential Manchester allow 8x,
16x, or 32x. The 8x option allows highest speed, whereas the 32x option provides the
greatest resolution.
0 = Default operation. The TXDx signal is only encoded when data is transmitted,
1 = The TXDx signal is always encoded, even when idles are transmitted.
00 = 1x clock mode. Only NRZ or NRZI encodings are allowed.
01 = 8x clock mode.
10 = 16x clock mode. Normally chosen for UART and AppleTalk.
11 = 32x clock mode.
00 = 1x clock mode. Only NRZ or NRZI decodings are allowed.
01 = 8x clock mode.
10 = 16x clock mode. Normally chosen for UART and AppleTalk.
11 = 32x clock mode.
including the preamble and opening and closing flags/syncs. When no data is
available to transmit, the signal is driven high.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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