mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 237

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Memory Management Unit
11.6.1.5 MMU DATA EFFECTIVE PAGE NUMBER REGISTER. The MMU data effective
page number (MD_EPN) register contains the effective address to be loaded into a TLB
entry.
EPN—Effective Page Number for Entry
The default value is the effective address of the last data TLB miss.
EV—TLB Entry Valid
This bit is set to 1 on a data TLB miss.
Bits 23–27—Reserved
These bits are reserved and must be set to 0. Ignores on write and returns a 0 on read.
ASID—Address Space ID
This field is the address space IDs of the TLB entry to be compared with the CASID field of
the M_CASID register.
MD_EPN
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = The data TLB entry is invalid.
1 = The data TLB entry is valid.
16
0
17
1
18
2
EPN
R/W
Freescale Semiconductor, Inc.
—
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
R/W
EV
22
—
6
23
SPR 795
SPR 795
7
EPN
R/W
—
24
8
RESERVED
R/W
25
9
0
10
26
11
27
12
28
13
29
ASID
R/W
—
MOTOROLA
14
30
15
31