mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1336

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

PowerPC User Instruction Set Architecture
PPM (definition),
PPP (definition),
PRE token,
preamble, sending,
processor, state of,
program flow tracking,
program trace cycle (definition),
program trace, reconstructing,
Programming
programming
PowerPC User Instruction Set Architecture
PowerPC User Instruction Set Architecture
PowerPC Virtual Environment Architecture
PowerPC Virtual Environment Architecture
Book 1
CPM interrupt controller,
data cache,
development port,
DSP,
general circuit interface,
HDLC bus controller,
IDL interface,
instruction cache,
memory management unit,
PCMCIA,
SCC2 in Ethernet mode example,
SCC2 in IrDA mode,
SCC2 in low-speed IrDA mode example,
SCC2 in middle-speed IrDA mode example,
SCC2 in Transparent mode example,
SCCx in AppleTalk mode,
SCCx in ASYNC HDLC mode example,
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
(Book 3), storage protection,
(Book 1)
(Book 1),
(Book 2)
(Book 2),
294
295
branch instructions,
branch processor,
computation modes,
exceptions,
fixed point-processor,
instruction classes,
load/store processor,
reserved fields,
operand placement effects,
storage control instructions,
storage model,
timebase,
instruction fetching,
16-27
16-355
17-9
16-283
7-1
7-4
10-3
16-266
16-287
16-145
7-6
16-209
6-20
7-2
9-4
20-41
20-2
7-4
7-1
16-291
16-261
7-2
7-1
7-2
7-2
Freescale Semiconductor, Inc.
16-149
16-334
7-1
16-503
7-3
7-2
16-265
20-2
For More Information On This Product,
11-15
20-3
16-276
7-7
7-5
7-5
MPC823 REFERENCE MANUAL
16-345
Go to: www.freescale.com
16-314
16-283
16-
16-
programming the SPLL,
promiscuous operation,
protocols
protocols of the SCCs,
protocols, asynchronous,
protocols, switching,
protocols, synchronous,
PSCR,
PSMR,
PSMR–ASYNC HDLC,
PSMR–Ethernet,
PSMR–HDLC,
PSMR–SCC UART,
PTR,
PTS (definition),
pull-up resistors,
pulses,
PWM (definition),
SCCx in HDLC mode example,
SCCx in HDLC mode,
SCCx in UART mode example,
SCCx in UART mode S-record example,
SCCx in UART mode,
SCCx Transparent mode patterns,
serial interface RAM,
serial peripheral interface master example,
serial peripheral interface slave example,
serial peripheral interface,
SIU interrupt controller,
SMC in Transparent mode NMSI example,
SMC in Transparent mode TSA example,
SMC in UART mode example,
SMC in UART mode,
system interface unit,
time-slot assigner,
TLB replacement counter,
universal serial bus,
user-programmable machines,
video controller,
SCC2 in IrDA mode,
SCCx in ASYNC HDLC mode,
SCCx in Ethernet mode,
SCCx in HDLC mode,
SCCx in Transparent mode,
SCCx in UART mode,
SMC in GCI mode,
SMC in Transparent mode,
SMC in UART mode,
2-8
253
229
450
451
420
421
17-11
16-173
16-290
,
13-4
16-239
15-41
16-474
16-334
19-5
16-214
16-197
16-115
16-160
16-422
16-276
16-298
5-1
16-186
16-362
16-284
16-120
16-392
16-389
16-190
12-30
16-235
16-203
16-230
16-198
12-7
,
16-315
16-389
16-440
11-51
16-406
16-298
16-404
16-266
15-43
16-252
16-227
16-301
Index-23
,
16-
Index
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16-
16-
16-
16-