mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 661

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
I—Interrupt
If this bit is set, the character in the CHARSEND field is transmitted. The TX bit is then set
in the SCCE–UART register and the core may be interrupted.
CT—Clear-to-Send Lost
This status bit indicates that the CTSx signal was negated when this character was
transmitted. If negation occurs, the CT bit in the UART transmit buffer descriptor is also set.
The DIAG field in the GSMR_L controls whether the CTSx signal is monitored by the serial
communication controllers.
A—Address
CHARSEND—Character Send
This field contains the character to be transmitted. Any 5-, 6-, 7-, or 8-bit character value can
be transmitted in accordance with the SCCx UART configuration. The character is in the
least-significant bits of CHARSEND. This value can be modified only while the REA bit is
cleared.
16.9.15.11 SENDING A BREAK. A break is an all-zeros character without a stop bit and
you can send it by issuing the STOP TRANSMIT command. The SCCx UART controller
finishes transmitting any outstanding data, sends a programmable number of break
characters according to the BRKCR, and then reverts to idle or sends data if the RESTART
TRANSMIT command was given before completion. When the break code is complete, the
transmitter sends at least one high bit before transmitting anymore data to guarantee a valid
start bit will be recognized. The break characters do not preempt characters already in the
transmit FIFO, which means that the break character may not be transmitted for eight or four
character times. To reduce this latency, set the TFL bit in the GSMR_H so that the FIFO size
will be reduced to one character before the SCCx transmitter is enabled.
16.9.15.12 SENDING A PREAMBLE. A preamble sequence is a convenient way for you to
ensure that a line is idle before you start a new message. The preamble sequence length is
constructed of consecutive ones of one character length. If the P bit in the UART transmit
buffer descriptor is set, the serial communication controller will send a preamble sequence
before transmitting that data buffer. For example, for 8 data bits, no parity, 1 stop bit, and 1
start bit, a preamble of 10 ones is sent before the first character in the buffer.
0 = In multidrop mode, the character being sent is a data character.
1 = In multidrop mode, the character being sent is address character.
Note: If the CTSx signal is negated during transmission and the communication
processor module transmits this character in the middle of a buffer transmission,
the CTSx signal could actually have been negated either during this character’s
transmission or during a buffer character’s transmission. In either case, the
communication processor module sets the CT bit here and in the TX buffer
descriptor status word.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
16-209

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