mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1294

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
stwcx.
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
18
B
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
else b
EA
if RESERVE then
if RESERVE_ADDR = physical_addr(EA)
MEM(EA, 4)
CR0
else
u
if u then MEM(EA, 4)
CR0
RESERVE
else
CR0
instruction stores rS to effective address (rA + rB), clears the
reserved bit, and sets CR0[EQ]. If the reserved bit is not set, the
stwcx. instruction does not do a store; it leaves the reserved bit
cleared and clears CR0[EQ]. Software must look at CR0[EQ] to
see if the stwcx. was successful.
The reserved bit is set by the lwarx instruction. The reserved bit
is cleared by any stwcx. instruction to any address, and also by
snooping logic if it detects that another processor does any kind
of store to the block indicated in the reservation buffer when
reserved is set.
If a reservation exists, and the memory address specified by the
stwcx. instruction is the same as that specified by the load and
reserve instruction that established the reservation, the contents
of rS are stored into the word in memory addressed by EA and
the reservation is cleared.
stwcx.
Store Word Conditional Indexed
if rA = 0 then b
EA is the sum (rA|0) + (rB). If the reserved bit is set, the stwcx.
20
MPC823 REFERENCE MANUAL
4
undefined 1-bit value
b + (rB)
Go to: www.freescale.com
0b00 || 0b1 || XER[SO]
0b00 || u || XER[SO]
0b00 || 0b0 || XER[SO]
21
5
rA)
rS,rA,rB
22
0
6
rS
0
23
7
24
rS
S
8
25
9
150
10
26
MPC823 Instruction Set—stwcx.
11
27
12
28
13
29
A
14
30
B-141
15
31
1

Related parts for mpc823rg