mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 45

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13-1. Bus Interface Signals .....................................................................................13-4
13-2. Data Bus Requirements For Read Cycles ...................................................13-26
13-3. Data Bus Contents for Write Cycles .............................................................13-27
13-4. BURST/TSIZE Encoding ..............................................................................13-33
13-5. Address Space Definitions ...........................................................................13-34
13-6. Termination Signal Protocol .........................................................................13-45
14-1. Little-Endian Effective Address Modification For Individual
14-2. Endian Mode Programming For Core Data Structures ..................................14-1
14-3. Little-Endian Program/Data Path Between the Register and
14-4. Little-Endian Program/Data Path Between the Register and
14-5. Little-Endian Program/Data Path Between the Register and
15-1. Memory Controller Register Usage ................................................................15-8
15-2. GPCM Strobe Signal Behavior .....................................................................15-28
15-3. Boot Bank Field Values After Reset .............................................................15-37
15-4. Start Address Locations ...............................................................................15-55
15-5. Enabling Byte-Selects ..................................................................................15-58
15-6. MxMR Loop Bit Usage .................................................................................15-60
15-7. Address Multiplexing ....................................................................................15-61
15-8. AMA/AMB Definition For DRAM Interface ....................................................15-62
15-9. GPL_x5 Signal (Pin) Behavior .....................................................................15-72
15-10. UPMA Register Settings ..............................................................................15-78
MOTOROLA
Number
Table
Aligned Scalar ................................................................................................14-1
32-Bit Memory ................................................................................................14-3
16-Bit Memory ................................................................................................14-4
8-Bit Memory ..................................................................................................14-4
LIST OF TABLES (Continued)
Freescale Semiconductor, Inc.
MPC823 REFERENCE MANUAL
ore Information On This Product,
External Bus Interface
Go to: www.freescale.com
Memory Controller
Endian Modes
Section 13
Section 14
Section 15
Title
Number
Page
xliii

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